DTCM_WR_RD_SEL=DTCM_WR_RD_SEL_0
DTCM Magic Address Register
DTCM_WR_RD_SEL | DTCM Write Read Select 0 (DTCM_WR_RD_SEL_0): When DTCM read access hits magic address, it will generate interrupt. 1 (DTCM_WR_RD_SEL_1): When DTCM write access hits magic address, it will generate interrupt. |
DTCM_MAGIC_ADDR | DTCM Magic Address |